Find the latest job offers from the SiNANO members (PhD, internship, post-doc, position…).
The Laboratoire des Technologies de la Microélectronique (LTM) is hiring a post-doctoral researcher in Microelectronics.
This position is part of the LabEx Microelectronics at the University of Grenoble Alpes (UGA), a center of excellence that brings together 12 laboratories (including one international laboratory) to address the technological, industrial, and environmental challenges of the next semiconductor revolution. Among other goals, this project aims to develop innovative solutions in micro- and nanoelectronics, with a particular focus on sustainability and circular electronics.
Main activities includes:
- Apply life cycle analysis methods
- Analyze relevant data from integrated circuit fabrication processes
- Evaluate and compare the various current integration schemes
- Develop case studies for the application of methodologies defined within the project, drawing on production lines and tools available at the research centers (CEA and UGA)
- Develop three-dimensional integration methods to address the use cases studied
- Analyze potential environmental rebound effects related to the choice of integration paths studied
- Collaborate with various partners to test the chosen technological directions
- Publish research articles
Details: here
Deadline for application: 11 May 2026
The Laboratoire des Technologies de la Microélectronique (LTM) is hiring a Researcher in Sustainable Microelectronics Circular Electronics.
As part of the LabEx Microelectronics project, you will join a team comprising the TIMA laboratories (secure design and PUFs), CEA-Leti (FPGA/ASIC prototyping and reliability), and UCLouvain (aging modeling and economic models) to develop lightweight authentication and traceability mechanisms, enabling the reuse of integrated circuits in a circular electronics framework.
Main activities includes:
1. Lightweight Hardware Authentication and Traceability /
- Design of lightweight hardware authentication primitives (PUFs, embedded sensors)
- Evaluation of robustness, uniqueness, reliability, and sensitivity to aging
- Modeling of aging mechanisms (BTI, HCI, etc.)
- Experimental validation on FPGAs and/or ASICs with accelerated aging campaigns
- Analysis of trade-offs between security, surface area, power consumption, and cost
2. Repurposing, Reconfiguration, and Business Models
- Study of realistic scenarios for the second life of integrated circuits
- Analysis of economic barriers and incentives for manufacturers
- Identification of pragmatic models that promote the adoption of multi-life electronics
3. Frugal Software, Modularity, and Obsolescence
- Analysis of software obsolescence as a barrier to circular electronics
- Definition of frugal software principles compatible with degraded performance
- A multi-level approach combining multi-life hardware design and long-term software support
- Publication of research articles related to these activities
- Integrated circuit design and hardware security
- Aging and reliability modeling
- FPGA prototyping and/or ASIC design
- Security analysis, traceability, and sustainability issues
- Required degree: Ph.D
Details: here
Deadline for application: 11 May 2026
The Laboratoire des Technologies de la Microélectronique (LTM) is looking for a Researcher for the Development of fast and non-invasive methods to assess end-of-life electronic components.
This research topic aims to develop non-invasive, non-destructive, fast, and suitable techniques for qualifying integrated electronic circuits at the end of their first life cycle, in order to facilitate their reuse.
Main activities includes:
- Study of the main aging mechanisms and their effects on the performance of an integrated circuit (IC).
- Identification of aging and/or performance signatures that can be extracted using non-invasive and non-destructive methods, such as imaging techniques, thermal mapping, power consumption analysis, electromagnetic emission patterns, etc. These measurements will be conducted in combination with an accelerated aging protocol.
- Analysis of the trade-off between high-fidelity characterization, testing time, cost, and the potential risk of damage to the tested integrated circuit.
- AI techniques can be used to extract meaningful signatures and predict the results of high-fidelity characterization (which may require slow and/or destructive measurements during direct testing) from a set of faster, simpler, and non-destructive low-fidelity measurements.
Details: here
Deadline for application: 28 May 2026
The Nanoelectronics Laboratory at the University of Granada is seeking a talented and motivated postdoctoral researcher to join a project focused on 2D materials and advanced semiconductor devices.
- The successful candidate will:
Lead clean room processes for the growth of 2D TMD materials (e.g., MoS₂, WS₂, HfS₂, MoSe₂, WSe₂) using CVD, MOCVD, PE-ALD, etc., compatible with CMOS BEOL integration. - Fabricate and characterize electronic and optoelectronic devices based on these materials.
- Develop CMOS-compatible architectures and optimize process integration.
- Supervise and support PhD/master’s students.
- Contribute to project deliverables, scientific publications, and outreach.
- Prepare and submit an Expression of Interest (EoI) (max. 2 pages), describing a research plan for the development of 2D material-based devices and their integration with silicon CMOS technologies
Details: here
Deadline for application: Open until filled
Email contact: Francisco Gámiz | fgamiz@ugr.es
